Digital Twin Frameworks for Real- Time Process Monitoring and Yield Prediction in Semiconductor Fabs

Abstract

Semiconductor fabs require fast process monitoring because small changes in tools, wafers, and recipes can reduce yield. Digital twins can connect live sensor data, metrology values, inspection results, and production records with a virtual process model. Existing monitoring methods often use fixed thresholds or static prediction models, which may detect process drift too late. This article presents a digital twin framework for real-time process monitoring and yield prediction in semiconductor fabs. The framework updates the process state every five minutes and uses engineered indicators for process deviation, wafer uniformity, chamber stability, defect risk, tool health, and cycle-time delay. The study compares conventional threshold monitoring, static machine learning prediction, and digital twin-based monitoring using simulated fab data. Results show that the digital twin method reduces yield prediction error from 6.8% to 2.1%, improves fault detection accuracy from 84.9% to 95.7%, and reduces response time from 18.5 min to 4.8 min.